1. Field of the Invention
The present invention relates to a master slave latch circuit, more particularly, it relates to an improvement of a circuit construction thereof.
2. Description of the Related Art
Conventionally, a latch circuit is formed by a clock driver gate which outputs a positive clock pulse and a negative clock pulse, a data gate which inputs one of the output clock pulses of the clock driver gate and a data signal, a latch gate which inputs the other output clock signal of the clock driver gate and an output of the latch circuit, and an output gate which inputs the output of the data gate and the output of the latch gate, and then outputs an output signal.
A conventional master slave latch circuit is formed by combining two latch circuits above. However, the clock driver cannot be commonly used to obtain a skew required for the circuit operation, as explained below. Further, as explained below, in the master slave latch circuit mentioned above, a racing phenomenon may occur because each gate in the master slave latch circuit has a different operation characteristic.